Table of Contents
PPT Slide
Asynchronous Inputs, Circuits and Systems
PPT Slide
Asynchronous Inputs
Reset
Metastability
Metastability - Example
Reducing the Metastability Risk
Reducing the Metastability Risk
Synchronizers
Arbiter
PPT Slide
Asynchronous Sequential Circuits
Asynchronous Sequential Circuits
Fundamental Mode
State Variables
Races, Cycles and Hazards
Races
Races
Cycles
Hazards
Static Hazards
Dynamic Hazards
Essential Hazards
PPT Slide
Analysis of Asynchronous Circuits
Virtual Buffer
Virtual Buffer
Asynchronous States and Transitions
State Tables
Transitions in State Tables
Design of Asynchronous Circuits
Asynchronous Design Example
States and Transitions
Primitive Flow Table
State Reduction
State Assignment
State Assignment
Critical Race Example
Critical Race Example
Critical Race Example
Critical Race Example
Critical Race Example
Cycle Example
Cycle Example
Cycle Example
State Assignment - Revisited
State Assignment - Revisited
Final Circuit
Verification Simulations
Verification Simulations
Essential Hazard Example
Essential Hazard Example
Essential Hazard Example
PPT Slide
Self Timed Design
Simple Self Timed Pipeline
Simple Self Timed Pipeline
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Simple Self Timed Pipeline Operation
Done Signal Generation
Done Signal Generation
Advantages of Self Timed Circuits
Disadvantages of Self Timed Circuits
The Future
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